DDR3 SDRAM components
Introduction of asynchronous RESET pin
Support of system-level flight-time compensation
On-DIMM mirror-friendly DRAM pinout
Introduction of CWL (CAS address latency) per alarm bin
On-die I/O arrangement engine
READ and WRITE calibration
DDR3 modules
Fly-by command/address/control bus with on-DIMM termination
High-precision arrangement resistors
Are not backwards compatible—DDR3 modules do not fit into DDR2 sockets; banishment them can accident the DIMM and/or the motherboard14
Technological advantages compared to DDR2
Higher bandwidth performance, up to 2133 MT/s standardized
Slightly bigger latencies, as abstinent in nanoseconds
Higher achievement at low ability (longer array activity in laptops)
Enhanced low-power features
Introduction of asynchronous RESET pin
Support of system-level flight-time compensation
On-DIMM mirror-friendly DRAM pinout
Introduction of CWL (CAS address latency) per alarm bin
On-die I/O arrangement engine
READ and WRITE calibration
DDR3 modules
Fly-by command/address/control bus with on-DIMM termination
High-precision arrangement resistors
Are not backwards compatible—DDR3 modules do not fit into DDR2 sockets; banishment them can accident the DIMM and/or the motherboard14
Technological advantages compared to DDR2
Higher bandwidth performance, up to 2133 MT/s standardized
Slightly bigger latencies, as abstinent in nanoseconds
Higher achievement at low ability (longer array activity in laptops)
Enhanced low-power features
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